1. Field of the Invention
The present invention relates to a transmission circuit, and in particular, to a transmission circuit which outputs a differential signal.
2. Description of Related Art
A CML (current mode logic) circuit is generally used as an output buffer of a transmission circuit for a high-speed interface circuits. The CML circuit uses a small-amplitude signal level and a differential signal transmitting method for signal transmission, in order to prevent an attenuation of the signal. Further, the CML circuit is a circuit through which current always passes, resulting in a large amount of current being consumed. Furthermore, in view of the trend for increasing speed of signal transmission, the current consumption of the CML circuit increases more and more, and becomes a problem.
In Patent Document 1, a technique for decreasing electric power consumption of an interface circuit of a transceiver system is disclosed.
[Patent Document 1] Japanese Unexamined Patent Application Publication No. 2004-200990